- Deep neural network accelerator
designs with approximate, stochastic, and
neuromorphic computing
ShanghaiTech University, 04/2021
- Towards area-efficient and
reliable processing-in-memory: A support from
emerging computing paradigms
Workshop on Device,
Architecture, and Application of
Processing-in-memory, Shanghai, China, 05/2020
- Unary computing meets ReRAM
crossbar: A novel solution for reliable
ReRAM-based neuromorphic computing
Workshop on Stochastic
Computing for Neuromorphic Architectures, virtual
event, 03/2020
- Approximate logic synthesis for
area and delay optimization
2019 Design, Automation, and Test in Europe
Conference (DATE) Friday Workshop "Quo Vadis, Logic
Synthesis?", Florence, Italy, 03/2019
- Optimizing stochastic number
generators for stochastic computing
ChinaDA
Conference, Shanghai, China, 01/2019
China Semiconductor Technology International
Conference (CSTIC), Shanghai, China, 03/2018
- Logic synthesis for approximate computing
IEEE CEDA Shanghai
Chapter Meeting, Shanghai, China, 11/2018
Asian
Test Symposium (ATS), Hefei, China, 10/2018
Ningbo University,
China, 07/2017
China
Semiconductor Technology International Conference
(CSTIC), Shanghai,
China, 03/2017
- Design and synthesis of
approximate computing circuits
China Test Conference,
Xi'an, China, 08/2020
Chinese University of Hong Kong, Hong Kong,
07/2018
Institute of Computing Technology,
Chinese Academy of Sciences, China, 12/2017
Peking
University, China, 12/2017
University
of Notre Dame, U.S.A.,
11/2017
University
of Michigan, U.S.A., 11/2017
Fudan
University, China, 09/2017
Southeast
University, China, 08/2017
Meji
University, Japan, 01/2017
ShanghaiTech
University, China, 12/2016
Zhejiang University, China,
12/2016
- The promise and challenge of
stochastic computing
Peking University, China, 12/2017
- Approximate computing: a novel
energy-efficient design methodology for
error-tolerant applications
Advanced Computer Architecture Conference, Weihai,
China, 08/2016
- Approximate computing and
approximate logic synthesis
Synopsys, Inc., Shanghai, China, 11/2015
- BDD-based synthesis of
reconfigurable single-electron transistor arrays
China
Semiconductor Technology International Conference
(CSTIC), Shanghai,
China, 03/2015
International Workshop on Emerging
Technologies of Synthesis and Optimization (IWETSO),
Shanghai,
China, 12/2014
- Digital design and synthesis for
emerging computing paradigm and device technology
Synopsys, Inc., Shanghai, China, 03/2015
Cadence Design Systems, Inc.,
Shanghai, China, 11/2014
- Digital computation on
stochastic bit streams: a pseudo-analog approach
International Workshop
on Emerging Circuits and Systems, Shanghai, China, 08/2012
- Digital yet deliberately
random: synthesizing logical computation on
stochastic bit streams
Department of
Electrical Engineering, University of California,
Riverside, U.S.A.,
03/2011
Department of
Electrical Engineering, University of Southern
California, U.S.A., 02/2011
Cadence Design Systems, Inc., U.S.A., 04/2011
- The synthesis of combinational
logic for probabilistic computation
Department of Electrical Engineering, California
Institute of Technology, U.S.A., 11/2009.
- Sequential optimization based
on signal equivalence merging and its validation
IBM T. J. Watson Research Center, U.S.A., 08/2008
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