2023
- Our paper entitled "DASALS:
Differentiable architecture search-driven
approximate logic synthesis" was accepted by the the 2023 International
Conference on Computer-Aided
Design (ICCAD).
This work is first-authored
by a Ph.D. student, Xuan Wang. It
adopts the idea of neural architecture search
and proposes a new approximate logic
synthesis method.
- Our paper entitled "MiniTNtk: An
exact synthesis-based method for minimizing
transistor network" was accepted by
the the 2023 International
Conference on
Computer-Aided
Design (ICCAD).
This work is first-authored by a Ph.D.
student, Weihua Xiao. It proposes a method
to synthesize a transistor network with the fewest
transistors for a given Boolean function.
- Kuncai
Zhong obtained his Ph.D. degree in June, 2023. He joined College of
Semiconductors (College of Integrated Circuits),
Hunan University as an assistant
professor. Congratulations! (See news)
- Chang
Meng obtained his Ph.D. degree in June, 2023. He joined EPFL, Switzerland
under the supervision of Prof.
Giovanni De Micheli. Congratulations!
- Wenhui Liang and Yi Ren joined our group as Ph.D.
students in September, 2023.
Welcome, Wenhui and Yi!
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Our paper entitled "HEDALS: Highly
efficient delay-driven approximate logic
synthesis" was accepted by the IEEE
Transactions on Computer-Aided Design of
Integrated Circuits and Systems. This work is first-authored by a Ph.D.
student, Chang Meng. The
code is made open source.
-
Our paper entitled "AccALS:
Accelerating approximate logic synthesis by
selection of multiple local approximate changes"
was accepted by the 2023 Design
Automation Conference. This work is first-authored
by a Ph.D. student, Xuan Wang. It proposes a
novel framework for accelerating iterative
approximate logic synthesis flows based on
simultaneous selection of multiple local
approximate changes in a single round.
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Our paper entitled
"High-accuracy low-power reconfigurable
architectures for decomposition-based
approximate lookup table" was accepted by the
2023
Design, Automation, and Test in Europe
Conference (DATE). This work is first-authored
by a Ph.D. student, Xingyue Qian. It proposes
a new and effective approximate Boolean
decomposition algorithm together with two reconfigurable
architectures based on approximate
decomposition.
-
Our paper entitled "MECALS: A
maximum error checking technique for
approximate logic synthesis" was accepted by
the 2023
Design,
Automation, and Test in Europe
Conference (DATE).
This work is first-authored by a Ph.D.
student, Chang Meng. It proposes an efficient
method for approximate logic synthesis under
maximum error constraint. The code is made open source.
2022
- Zexi Li and Ruicheng Dai joined our group as
Ph.D. students in September, 2022.
Welcome, Zexi and Ruicheng!
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-
Our paper entitled "Exploiting uniform spatial
distribution to design efficient random number
source for stochastic computing" was accepted by
the 2022
International
Conference on
Computer-Aided Design
(ICCAD).
This work is first-authored by a Ph.D.
student, Kuncai Zhong. It proposes a random number source
design methodology based on uniform distribution
for stochastic computing.
-
Our paper entitled "ASPPLN: Accelerated
symbolic probability propagation in logic network"
was accepted by the 2022
International
Conference on
Computer-Aided Design
(ICCAD).
This work is first-authored by a Ph.D. student,
Weihua Xiao. It proposes an efficient symbolic probability
propagation method, which is useful in power
estimation, reliability analysis, and error
analysis for approximate circuits.
- Shanshan Han joined our group as a
Ph.D. student in April, 2022. Welcome, Shanshan!
- Xingyue Qian successfully
transferred as a Ph.D. student in our group.
Congratulations, Xingyue!
- Ziqi Meng obtained her master of
science degree in March, 2022. She continued her Ph.D.
study at the University of
Pennsylvania. Congratulations!
-
-
Our paper entitled "SEALS:
Sensitivity-driven efficient approximate logic
synthesis" was accepted by the 2022 Design
Automation Conference (DAC). This work is
co-first-authored by two Ph.D. students, Chang
Meng and Xuan Wang. It proposes a
sensitivity-driven efficient approximate logic
synthesis (ALS) method to speed up a greedy ALS
flow. SEALS centers around a novel concept called
sensitivity, which enables a fast and accurate
error estimation method and an efficient method to
filter out unpromising local approximate changes.
-
Our paper entitled "Write or not:
Programming scheme optimization for RRAM-based
neuromorphic computing" was accepted by the 2022 Design
Automation Conference (DAC). This work is
first-authored by a master student, Ziqi Meng. It
optimizes the write-and-verify process used to
tolerate the device-to-device variation and the
cycle-to-cycle variation of RRAM devices used in
neuromorphic computing. Specifically, it proposes
a probabilistic termination criterion on a single
device and a systematic optimization method on
multiple devices.
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Our paper entitled "Towards low-cost
high-accuracy stochastic computing architecture
for univariate functions: Design and design space
exploration" was accepted by the 2022
Design, Automation, and Test in Europe
Conference (DATE). This work is
first-authored by a Ph.D. student, Kuncai Zhong.
It proposes a stochastic computing architecture
with a single stochastic number generator and a
minimum number of D flip-flops to implement
univariate functions. To efficiently configure the
architecture to achieve a high accuracy, a design
space exploration method is also proposed.
-
Our paper entitled "OPACT: Optimization
of approximate compressor tree for approximate
multiplier" was accepted by the 2022
Design, Automation, and Test in Europe
Conference (DATE). This work is
first-authored by a Ph.D. student, Weihua Xiao. It
proposes a method for optimizing approximate
compressor tree of approximate multiplier. The
method includes two parts, optimization of
compressor allocation and optimization of
connection order of the compressors.
-
Our
paper entitled "VECBEE: A versatile
efficiency-accuracy configurable batch error
estimation method for greedy approximate logic
synthesis" was accepted by the IEEE Transactions
on Computer-Aided Design of Integrated Circuits
and Systems. This work is co-first-authored by a
previous master student, Sanbao Su, and a current
Ph.D. student, Chang Meng. The code is made
open source.
2021
- Jian Shi and Xianjue Cai joined our group as
Ph.D. students in September, 2021.
Welcome, Jian and Xianjue!
- Chen
Wang obtained his Ph.D. degree in September,
2021. He
joined Shanghai
AnLogic Infotech Co., Ltd. Congratulations!
-
Our
paper entitled "DALTA: A decomposition-based
approximate lookup table architecture" was
accepted by the 2021 International
Conference on Computer-Aided
Design (ICCAD).
This work is first-authored by a Ph.D. student,
Chang Meng. It proposes a low-cost
reconfigurable lookup table architecture based
on Boolean decomposition to implement target
functions approximately, together with the
associated configuration methods.
-
Our
paper entitled "MinSC: An exact synthesis-based
method for minimal area stochastic circuits
under relaxed error bound" was accepted by the
2021 International
Conference on Computer-Aided
Design (ICCAD).
This work is first-authored by a Ph.D. student,
Xuan Wang. It proposes an SMT-based exact
synthesis method for obtaining an area-optimal
stochastic circuits under relaxed error bound. The
code is made open source.
-
-
Our paper entitled
"GOMIL: global optimization of multiplier by
integer linear programming" was accepted as an
oral presentation by the 2021 Design,
Automation, and Test in Europe Conference (DATE).
This work is first-authored by a Ph.D. student,
Weihua Xiao. It proposes an effective integer
linear programming-based method for global
optimization of digital multipliers. The code is made open
source.
-
Our
paper entitled "Digital offset for RRAM-based
neuromorphic computing: a novel solution to
conquer cycle-to-cycle variation" was accepted as
an oral presentation by the 2021 Design,
Automation, and Test in Europe Conference (DATE).
This work is first-authored by a master student,
Ziqi Meng. It proposes an effective solution for
addressing the resistance variation problem of
RRAM crossbar-based neural network accelerators.
The idea is to introduce tunable digital offsets
into the RRAM crossbar, which enables a
variation-aware weight optimization and a
post-writing tuning technique.
2020
- Xingyue Qian joined our group as a
master student in September, 2020. Welcome, Xingyue!
- Xuan Wang joined our group as a
Ph.D. student in August, 2020. Welcome, Xuan!
-
Our
paper entitled "Exploring target function
approximation for stochastic circuit minimization"
was accepted by the 2020 International
Conference on Computer-Aided Design
(ICCAD).
This work is first-authored by a Ph.D student,
Chen Wang. It proposes a method that explores
target function approximation to derive an SC
circuit with significantly reduced area and delay. The code is made open source.
-
-
Our
paper entitled "ALSRAC: approximate logic
synthesis by resubstitution with approximate care
set" was accepted by the 2020 Design Automation
Conference (DAC). This work is
first-authored by a Ph.D student, Chang Meng. It
proposes an efficient and effective approximate
logic synthesis flow based approximate
resubstitution. The code is made open source.
-
Our
paper entitled "When sorting network meets
parallel bitstreams: A fault-tolerant parallel
ternary neural network (TNN) accelerator based on
stochastic computing" was accepted as a poster
presentation by the 2020 Design,
Automation, and Test in Europe Conference (DATE).
This work is
first-authored by Yawen Zhang, a co-advised
student. It gives a novel
view on parallel bit stream computing.
-
Our
paper entitled "Go unary: a novel synapse
coding and mapping scheme for reliable
ReRAM-based neuromorphic computing" was
accepted as a long presentation by the 2020 Design,
Automation, and Test in Europe Conference
(DATE) and nominated for the best
paper award. This work is first-authored
by Chang Ma, a co-advised student. It applies
unary encoding, an encoding form related to
stochastic encoding, to solve the reliability
issue of ReRAM-based crossbar array for
performing matrix-vector multiplication
operation.
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2019
-
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Weihua Xiao
joined our group as Ph.D. student in September,
2019. Welcome, Weihua!
-
Ziqi Meng joined
our group as master student in September, 2019.
Welcome, Ziqi!
-
Chang Meng got
the second place at the programming contest at
2019 International Workshop on Logic and
Synthesis. Congratulations!
-
Zhuangzhuang
Zhou, a JI undergraduate student, was awarded
the first place at the 2019 ACM Student Research
Competition (ACM SRC) Grand Finals -
undergraduate student category.
Congratulations to Zhuangzhuang! (See official
announcement, news
report 1 and news
report 2.)
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-
2018
-
Weikang
recieved the 2018 Research Excellence Award at
JI.
-
-
Zhuangzhuang
Zhou, a JI undergraduate student, was awarded
the first place at the ACM Special Interest
Group on Design Automation Student Research
Competition (ACM/SIGDA SRC) - undergraduate
student category. Congratulations
to Zhuangzhuang!
- Kuncai Zhong and
Chang Meng joined our group as Ph.D. students in
September, 2018. Welcome, Kuncai and Chang!
- We
presented our work on delay-driven approximate logic
synthesis at the 2018 International
Conference on Computer-Aided Design (ICCAD)
in Nov., 2018. This work is first-authored by a JI undergraduate student, Zhuangzhuang
Zhou.
- Our paper on error analysis of
approximate adders was accepted by IEEE
Transactions on Computers. This work is
co-first-authored by a Ph.D. student,
Yi Wu and two JI
undergraduate students, You Li and Xiangxuan Ge.
- Our paper on synthesizing stochastic
circuits was accepted by IEEE
Transactions on Computer Aided-Design of
Integrated Circuits and Systems. This work is
first-authored by a JI undergraduate student, Zhijing
Li.
- We
presented our work on error estimation for
approximate logic synthesis at the
2018 Design
Automation Conference (DAC) in June,
2018. This work is first-authored by a master student,
Sanbao Su.
2017
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Yi Wu obtained
her Ph.D. degree in September, 2017. She joined Synopsys,
Inc. Congratulations!
-
-
-
Zili Lin obtained
his master of science degree in March, 2017. He joined Synopsys, Inc.
Congratulations!
-
2016
-
Meng Yang and
Sanbao Su joined our group as master students in
September, 2016. Welcome, Meng and Sanbao!
-
We
presented our work on synthesizing approximate
circuits at the Design
Automation Conference (DAC) in June, 2016.
This work is first-authored by a Ph.D. student, Yi
Wu.
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-
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Chuyu
Shen obtained his master of
science degree in March, 2016. He joined Jin Ri Tou
Tiao. Congratulations!
2015
-
We presented our
work on synthesizing approximate circuits at the International
Conference on ASIC (ASICON) in November,
2015. This work is first-authored by Chen Zou, a
co-advised undergraduate student from Fudan
University.
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Zheng Zhao obtained her master
of science degree in March, 2015. She
got several Ph.D. offers from top universities
including CMU, UIUC, and UT, Austin. She finally
decided to go to UT, Austin. Congratulations!
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2014
-
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Zili Lin and
Xuesong Peng joined our group as master students
in September, 2014. Welcome, Zili and Xuesong!
-
-
-
Chen Wang
obtained his master of science degree in March,
2014. Congratulations! Chen will continue for a
Ph.D. study in our group.
2013
2012
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Yi Wu joined our
group as a Ph.D. student in September, 2012.
Welcome, Yi!
-
Junjun Hu and
Zheng Zhao joined our group as master students in
September, 2012. Welcome, Junjun, and Zheng!
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