Emerging Computing Technology Laboratory at SJTU 
HomePeopleResearchPublicationsTeachingActivitiesCodes
& Links 
Notes 

Book Chapters 
B5. Zhiyuan
Xiang^$, Niyiqiu Liu^$, Yue Yao^, Fan Yang, Cheng
Zhuo, and Weikang Qian, "Approximate
logic synthesis for FPGA by decomposition," in Approximate
Computing, Weiqiang Liu and Fabrizio Lombardi
editors, Springer Publishing, 2022, pp. 149174.
($These authors contributed equally.) B4. Ying Wu, Chuangtao Chen, Chenyi Wen, Weikang Qian, Xunzhao Yin, and Cheng Zhuo, "Approximate multiplier design for energy efficiency: From circuit to algorithm," in Approximate Computing, Weiqiang Liu and Fabrizio Lombardi editors, Springer Publishing, 2022, pp. 5176. B3. Marc Riedel and Weikang Qian "Synthesis of polynomial functions," in Stochastic Computing: Techniques and Applications, Warren Gross and Vincent Gaudet editors, Springer Publishing, 2019. B2. Xuesong Peng* and Weikang Qian, "A branchandboundbased minterm assignment algorithm for synthesizing stochastic circuit," in Advanced Logic Synthesis, Andre Reis and Rolf Drechsler editors, Springer Publishing, 2018. B1. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "Synthesizing combinational logic to generate probabilities: theories and algorithms," in Advanced Techniques in Logic Synthesis, Optimizations and Applications, Sunil Khatri and Kanupriya Gulati editors, Springer Publishing, 2011. 
Journal Papers 
J30.
Shanshan Liu, Josep L. Rossello, Siting Liu, Xiaochen
Tang, Joan FontRossello, Christian F. Frasser, Weikang
Qian, Jie Han, Pedro Reviriego, and Fabrizio
Lombardi, "From
Multipliers to integrators: a survey of stochastic
computing primitives," in IEEE Transactions on
Nanotechnology, vol. 23, pp. 238249, 2024. J29. Ying Wu, Chuangtao Chen, Weihua Xiao*, Xuan Wang*, Chenyi Wen, Jie Han, Xunzhao Yin, Weikang Qian, and Cheng Zhuo, "A survey on approximate multiplier designs for energy efficiency: From algorithms to circuits," in ACM Transactions on Design Automation of Electronic Systems, vol. 29, no. 1, pp. 23:123:37, 2024. J28. Chen Nie, Chenyu Tang, Jie Lin, Huan Hu, Chenyang Lv, Ting Cao, Weifeng Zhang, Li Jiang, Xiaoyao Liang, Weikang Qian, Yanan Sun, and Zhezhi He, "VSPIM: SRAM processinginmemory DNN acceleration via vectorscalar operations," in IEEE Transactions on Computers, 2023. J27. Chang Meng*, Zhuangzhuang Zhou^, Yue Yao^, Shuyang Huang^, Yuhang Chen, and Weikang Qian, "HEDALS: Highly efficient delaydriven approximate logic synthesis," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 42, no. 11, pp. 34913504, 2023. (Source code: ) J26. Patrick Holec, Weikang Qian, Marc Riedel, and Ivo Rosenberg, "Characterizing polynomial arithmetic with stochastic circuits," in Journal of MultipleValued Logic and Soft Computing, 2022. J25. Yixuan Hu, Yawen Zhang, Runsheng Wang, Zuodong Zhang, Jiahao Song, Xiyuan Tang, Weikang Qian, Yanzhi Wang, Yuan Wang, and Ru Huang, "A 28nm 198.9 TOPS/W faulttolerant stochastic computing neural network processor," in IEEE SolidState Circuits Letters, vol. 5, pp. 198201, 2022. J24. Sanbao Su*$, Chang Meng*$, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, and Weikang Qian, "VECBEE: A versatile efficiencyaccuracy configurable batch error estimation method for greedy approximate logic synthesis," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 41, no. 11, pp. 50855099, 2022. ($These authors contributed equally.) (Source code: ) J23. Chuangtao Chen, Weikang Qian, Mohsen Imani, Xunzhao Yin, and Cheng Zhuo, "PAM: A piecewiselinearlyapproximated floatingpoint multiplier with unbiasedness and configurability," in IEEE Transactions on Computers, vol. 71, no. 10, pp. 24732486, 2022. J22. Weikang Qian, "Logic synthesis for approximate circuits," in Communications of the China Computer Federation, vol. 17, no. 12, pp. 2225, 2021. (Invited Paper; in Chinese) J21. Yanan Sun, Chang Ma*, Zhi Li, Yilong Zhao, Jiachen Jiang, Weikang Qian, Rui Yang, Zhezhi He, and Li Jiang, "Unary coding and variationaware optimal mapping scheme for reliable ReRAMbased neuromorphic computing," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 40, no. 12, pp. 24952507, 2021. J20. Chuliang Guo, Li Zhang, Xian Zhou, Grace Li Zhang, Bing Li, Weikang Qian, Xunzhao Yin, and Cheng Zhuo, "A reconfigurable multiplier for signed multiplications with asymmetric bitwidths," in ACM Journal on Emerging Technologies in Computing Systems, vol. 17, no. 4, pp. 48:148:16, 2021. J19. Yi Wu* and Weikang Qian, "ALFANS: Multilevel approximate logic synthesis framework by approximate node simplification," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 39, no. 7, pp. 14701483, 2020. J18. Sanbao Su*, Chen Zou^, Weijiang Kong^, Jie Han, and Weikang Qian, "A novel heuristic search method for twolevel approximate logic synthesis," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 39, no. 3, pp. 654669, 2020. J17. Zhijing Li^, Zhao Chen^, Yili Zhang^, Zixin Huang^, and Weikang Qian, "Simultaneous area and latency optimization for stochastic circuits by D flipflop insertion," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 38, no. 7, pp. 12511264, 2019. J16. Yanan Sun, Jiawei Gu, Weifeng He, Qian Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, and Li Jiang, "Energyefficient nonvolatile SRAM design based on resistive switching multilevel cell," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 5, pp. 753757, 2019. J15. Junjun Hu*, Zhijing Li^, Meng Yang*, Zixin Huang^, and Weikang Qian, "A highaccuracy approximate adder with correct sign calculation," in Integration, the VLSI Journal, vol. 65, pp. 370388, 2019. J14. Yi Wu*$, You Li^$, Xiangxuan Ge^$, Yuan Gao^, and Weikang Qian, "An efficient method for calculating the error statistics of blockbased approximate adders," in IEEE Transactions on Computers, vol. 68, no. 1, pp. 2138, 2019. ($These authors contributed equally and are considered as the cofirst authors.) J13. Xuesong Peng* and Weikang Qian, "Stochastic circuit synthesis by cube assignment," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 37, no. 12, pp. 31093122, 2018. J12. Armin Alaghi, Weikang Qian, and John Hayes, "The promise and challenge of stochastic computing," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 37, no. 8, pp. 15151531, 2018. (Keynote paper) J11. Chen Wang*, Yanan Sun, Shiyan Hu, Li Jiang, and Weikang Qian, "Variationaware global placement for improving timingyield of carbonnanotube field effect transistor circuit, " in ACM Transactions on Design Automation of Electronic Systems, vol. 23, no. 4, pp. 44:144:27, 2018. J10. Yanbo Wang, Weikang Qian, and Bo Yuan, "A graphical model of smokinginduced global instability in lung cancer," in IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol. 15, no.1, pp. 114, 2018. J9. M. Hassan Najafi, Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, "A reconfigurable architecture with sequential logicbased stochastic computing," in ACM Journal on Emerging Technologies in Computing Systems, vol. 13, no. 4, pp. 57:157:28, 2017. J8. Yu Wang^, Weikang Qian, Shuchang Zhang, Xiaoyao Liang, and Bo Yuan, "A learning algorithm for Bayesian networks and its efficient implementation on GPUs," in IEEE Transactions on Parallel and Distributed Systems, vol. 27, no. 1, pp. 1730, 2016. J7. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, "Synthesizing cubes to satisfy a given intersection pattern," in Journal of Discrete Applied Mathematics, vol. 193, pp. 1138, 2015. J6. Peng Li, David J. Lilja, Weikang Qian, Marc D. Riedel, and Kia Bazargan, "Logical computation on stochastic bit streams with linear finite state machines," in IEEE Transactions on Computers, vol. 63, no. 6, pp. 14741486, 2014. J5. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc. D. Riedel, "Computation on stochastic bit streams: digital image processing case studies," in IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 22, no. 3, pp. 449462, 2014. J4. Weikang Qian, Marc D. Riedel, Hongchao Zhou, and Jehoshua Bruck, "Transforming probabilities with combinational logic," in IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 30, no. 9, pp. 12791292, 2011. J3. Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "An architecture for faulttolerant computation with stochastic logic," in IEEE Transactions on Computers, vol. 60, no. 1, pp. 93105, 2011. J2. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, "Uniform approximation and Bernstein polynomials with coefficients in the unit interval," in European Journal of Combinatorics, vol. 32, no. 3, pp. 448463, 2011. J1. Weikang Qian, John Backes, and Marc D. Riedel, "The synthesis of stochastic circuits for nanoscale computation," in International Journal of Nanotechnology and Molecular Computation, vol. 1, no. 4, pp. 3957, 2010. 
Conference Papers 
C83. Weihua
Xiao*$, Tingting Zhang$, Xingyue Qian*, Jie Han, and Weikang
Qian, "Efficient
approximate decomposition solver using Ising model,"
in Proceedings of the 2024 ACM/IEEE Design
Automation Conference (DAC), San Francisco, CA,
USA, 2024, pp. 16. ($These authors contributed
equally.) (Acceptance rate: 23%) C82. Chang Meng*, Hanyu Wang, Yuqi Mai^, Weikang Qian, and Giovanni De Micheli, "VACSEM: Verifying average errors in approximate circuits using simulationenhanced model counting," in Proceedings of the 2024 Design, Automation, and Test in Europe Conference (DATE), Valencia, Spain, 2024, pp. 16. (Nominated for Best Paper Award; Acceptance rate: 25%) C81. Zexi Li*$, Haoran Jin^$, Kuncai Zhong, Guojie Luo, Runsheng Wang, and Weikang Qian, "SCGen: A versatile generator framework for agile design of stochastic circuits," in Proceedings of the 2024 Design, Automation, and Test in Europe Conference (DATE), Valencia, Spain, 2024. ($These authors contributed equally.) (Acceptance rate: 25%) (Source code: ) C80. Chenyu Tang, Chen Nie, Weikang Qian, and Zhezhi He, "PIMLC: Logic compiler for bitserialbased PIM," in Proceedings of the 2024 Design, Automation, and Test in Europe Conference (DATE), Valencia, Spain, 2024, pp. 12. (Acceptance rate: 25%) C79. Xingyue Qian*, Zhezhi He, and Weikang Qian, "An efficient logic operation scheduler for minimizing memory footprint of inmemory SIMD computation" in Proceedings of the 2024 Design, Automation, and Test in Europe Conference (DATE), Valencia, Spain, 2024, pp. 12. (Extended abstract; Acceptance rate: 32%) C78. Jian Shi*, Wenjing Zhang^, and Weikang Qian, "CLAST: Crosslayer approximate highlevel synthesis with configurable approximate threeoperand adders," in Proceedings of the 2024 Design, Automation, and Test in Europe Conference (DATE), Valencia, Spain, 2024, pp. 12. (Extended abstract; Acceptance rate: 32%) C77. Jian Shi* and Weikang Qian, "Runtime configurable approximate computing system for simulated annealing algorithm," in Proceedings of the 2024 China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 2024, pp. 13. C76. Chenyang Lv, Ziling Wei, Weikang Qian, Junjie Ye, Chang Feng and Zhezhi He, "GPTLS: Generative pretrained transformer with offline reinforcement learning for logic synthesis," in Proceedings of the 41st IEEE International Conference on Computer Design (ICCD), Washington D.C., USA, 2023, pp. 320326. C75. Weihua Xiao*, Shanshan Han*, Yue Yang^, Shaoze Yang^, Cheng Zheng^, Jingsong Chen, Tingyuan Liang, Lei Li, and Weikang Qian, "MiniTNtk: An exact synthesisbased method for minimizing transistor network," in Proceedings of the 2023 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Francisco, CA, USA, 2023, pp. 19. (Acceptance rate: 23.0%) C74. Xuan Wang*, Zheyu Yan, Chang Meng*, Yiyu Shi, and Weikang Qian, "DASALS: Differentiable architecture searchdriven approximate logic synthesis," in Proceedings of the 2023 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Francisco, CA, USA, 2023, pp. 19. (Acceptance rate: 23.0%) C73. Xuan Wang*, Sijun Tao^, Jingjing Zhu^, Yiyu Shi, and Weikang Qian, "AccALS: Accelerating approximate logic synthesis by selection of multiple local approximate changes," in Proceedings of the 2023 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2023. (Acceptance rate: 23%) C72. Chen Nie$, Xianjue Cai*$, Chenyang Lv$, Chen Huang^, Weikang Qian, and Zhezhi He, "XMGGPPIC: Efficient and Robust GeneralPurpose ProcessinginCache with XORMajorityGraph," in Proceedings of the 2023 Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, USA, 2023. ($These authors contributed equally.) C71. Jian Shi* and Weikang Qian, "Implementing Boolean function by ternary content addressable memory with approximate match," in Proceedings of the 2023 China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 2023. C70. Xingyue Qian*, Chang Meng*, Xiaolong Shen, Junfeng Zhao, Leibin Ni, and Weikang Qian, "Highaccuracy lowpower reconfigurable architectures for decompositionbased approximate lookup table," in Proceedings of the 2023 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2023. (Acceptance rate: 25%) C69. Chang Meng*, Jiajun Sun^, Yuqi Mai^, and Weikang Qian, "MECALS: A maximum error checking technique for approximate logic synthesis," in Proceedings of the 2023 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2023. (Acceptance rate: 25%) (Source code: ) C68. Kuncai Zhong*, Xuan Wang*, Chen Wang*, and Weikang Qian, "Joint optimization of randomizer and computing core for lowcost stochastic circuits," in Proceedings of the ACM International Symposium on Nanoscale Architectures (NANOARCH), virtual event, 2022. (Invited paper) C67. Kuncai Zhong*, Zexi Li^, Haoran Jin^, and Weikang Qian, "Exploiting uniform spatial distribution to design efficient random number source for stochastic computing," in Proceedings of the 2022 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Diego, CA, USA, 2022. (Acceptance rate: 22.5%) C66. Weihua Xiao* and Weikang Qian, "ASPPLN: Accelerated symbolic probability propagation in logic network," in Proceedings of the 2022 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Diego, CA, USA, 2022. (Acceptance rate: 22.5%) C65. Xingyue Qian*, Jian Shi*, Li Shi^, Haoyang Zhang^, Lijian Bian, and Weikang Qian, "Scheduling informationguided efficient highlevel synthesis design space exploration," in Proceedings of the 40th IEEE International Conference on Computer Design (ICCD), Lake Tahoe, USA, 2022. C64. Chang Meng*$, Xuan Wang*$, Jiajun Sun^, Sijun Tao^, Wei Wu, Zhihang Wu, Leibin Ni, Xiaolong Shen, Junfeng Zhao, and Weikang Qian, "SEALS: Sensitivitydriven efficient approximate logic synthesis," in Proceedings of the 2022 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2022. ($These authors contributed equally and are considered as the cofirst authors; Jiajun Sun and Sijun Tao also contributed equally.) (Acceptance rate: 23%) C63. Ziqi Meng*, Yanan Sun, and Weikang Qian, "Write or not: Programming scheme optimization for RRAMbased neuromorphic computing," in Proceedings of the 2022 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2022. (Acceptance rate: 23%) C62. Xuan Wang* and Weikang Qian, "MinAC: Minimalarea approximate compressor design based on exact synthesis for approximate multipliers," in Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022. (Source code: ) C61. Chenfei Lou^, Weihua Xiao*, and Weikang Qian, "Quantified satisfiabilitybased simultaneous selection of multiple local approximate changes under maximum error bound," in Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022. C60. Kuncai Zhong*, Zexi Li^, and Weikang Qian, "Towards lowcost highaccuracy stochastic computing architecture for univariate functions: Design and design space exploration," in Proceedings of the 2022 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2022. (Acceptance rate: 25%) C59. Weihua Xiao*, Cheng Zhuo, and Weikang Qian, "OPACT: Optimization of approximate compressor tree for approximate multiplier," in Proceedings of the 2022 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2022. (Acceptance rate: 25%) C58. Chen Wang* and Weikang Qian, "Linear feedback shift register reseeding for stochastic circuit repairing and minimization," to appear in Proceedings of the 2022 Asia and South Pacific Design Automation Conference (ASPDAC), Taipei, Taiwan, 2022. C57. Xuan Wang*, Zhufei Chu, and Weikang Qian, "MinSC: An exact synthesisbased method for minimalarea stochastic circuits under relaxed error bound," to appear in Proceedings of the 2021 IEEE/ACM International Conference on ComputerAided Design (ICCAD), Munich, Germany, 2021. (Acceptance rate: 23.5%) (Source code: ) C56. Chang Meng*, Zhiyuan Xiang^, Niyiqiu Liu^, Yixuan Hu, Jiahao Song, Runsheng Wang, Ru Huang, and Weikang Qian, "DALTA: A decompositionbased approximate lookup table architecture," to appear in Proceedings of the 2021 IEEE/ACM International Conference on ComputerAided Design (ICCAD), Munich, Germany, 2021. (Acceptance rate: 23.5%) C55. Yifan Qian^, Chang Meng*, Yawen Zhang, Weikang Qian, Runsheng Wang, and Ru Huang, "Approximate logic synthesis in the loop for designing lowpower neural network accelerator," in Proceedings of the 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, South Korea, 2021, pp. 15. (Invited paper) C54. Runsheng Wang, Zuodong Zhang, Yawen Zhang, Yixuan Hu, Yanan Sun, Weikang Qian, and Ru Huang, "Can emerging computing paradigms help enhancing reliability towards the end of technology roadmap?" in Proceedings of the 2021 International Reliability Physics Symposium (IRPS), virtual event, 2021, pp. 17. (Invited paper) C53. Weiyi Liu, Yanan Sun, Weifeng He, and Weikang Qian, "Design of ternary logic based on ReRAM crossbars," in Proceedings of the 2021 China Semiconductor Technology International Conference (CSTIC), virtual event, Shanghai, China, 2021, pp. 13. C52. Weihua Xiao*, Weikang Qian, and Weiqiang Liu, "GOMIL: global optimization of multiplier by integer linear programming," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event, Grenoble, France, 2021, pp. 374379. (Acceptance rate: 23.9%) (Source code: ) C51. Ziqi Meng*, Weikang Qian, Yanan Sun, Yilong Zhao, Rui Yang, and Li Jiang, "Digital offset for RRAMbased neuromorphic computing: a novel solution to conquer cycletocycle variation," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event, Grenoble, France, 2021, pp. 10781083. (Acceptance rate: 23.9%) C50. Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, and WenHao Liu, "ALIFRouter: a practical architecturelevel interFPGA router for logic verification," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event, Grenoble, France, 2021, pp. 15701573. (Acceptance rate for poster: 36%) C49. Chen Wang*, Weihua Xiao*, John Hayes, and Weikang Qian, "Exploring target function approximation for stochastic circuit minimization," in Proceedings of the 2020 IEEE/ACM International Conference on ComputerAided Design (ICCAD), virtual event, 2020, pp. 122:1122:9. (Acceptance rate: 27.0%) (Source code: ) C48. Chuangtao Chen, Sen Yang, Weikang Qian, Mohsen Imani, Xunzhao Yin, and Cheng Zhuo, "Optimally approximated and unbiased floatingpoint multiplier with runtime configurability," in Proceedings of the 2020 IEEE/ACM International Conference on ComputerAided Design (ICCAD), virtual event, 2020, pp. 121:1121:9. (Nominated for Best Paper Award; Acceptance rate: 27.0%) C47. Zuodong Zhang, Runsheng Wang, Zhe Zhang, Ru Huang, Chang Meng*, Weikang Qian, and Zhuangzhuang Zhou^, "Reliabilityenhanced circuit design flow based on approximate logic synthesis," in Proceedings of the 2020 Great Lakes Symposium on VLSI (GLSVLSI), virtual event, 2020, pp. 7176. C46. Chang Meng*, Weikang Qian, and Alan Mishchenko, "ALSRAC: approximate logic synthesis by resubstitution with approximate care set," in Proceedings of the 2020 Design Automation Conference (DAC), virtual event, 2020, pp. 187:1187:6. (Acceptance rate: 23.2%) (Source code: ) C45. Yawen Zhang*, Runsheng Wang, Yixuan Hu, Weikang Qian, Yanzhi Wang, Yuan Wang, and Ru Huang, "Accurate and energyefficient implementation of nonlinear adder in parallel stochastic computing using sorting network," in Proceedings of the 2020 IEEE International Symposium on Circuits and Systems (ISCAS), virtual event, 2020, pp. 15. C44. Kuncai Zhong* and Weikang Qian, "Accuracy analysis for stochastic circuits with D flipflop insertion," in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE), virtual event, 2020, pp. 598603. (Acceptance rate: 25.9%) C43. Chang Ma*, Yanan Sun, Weikang Qian, Ziqi Meng*, Rui Yang, and Li Jiang, "Go unary: a novel synapse coding and mapping scheme for reliable ReRAMbased neuromorphic computing," in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE), virtual event, 2020, pp. 14321437. (Nominated for Best Paper Award; Acceptance rate: 25.9%) C42. Yawen Zhang*, Sheng Lin, Runsheng Wang, Yanzhi Wang, Yuan Wang, Weikang Qian, and Ru Huang, "When sorting network meets parallel bitstreams: A faulttolerant parallel ternary neural network (TNN) accelerator based on stochastic computing," in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE), virtual event, 2020, pp. 12871290. (Acceptance rate for poster: 37%) C41. Chuliang Guo, Li Zhang, Xian Zhou, Weikang Qian, and Cheng Zhuo, "A reconfigurable approximate multiplier for quantized CNN applications," in Proceedings of the 2020 Asia and South Pacific Design Automation Conference (ASPDAC), Beijing, China, 2020, pp. 235240. (Acceptance rate: 30.8%) C40. Lun Zhang*, Weikang Qian, and Haibao Chen, "Areaefficient parallel stochastic computing with shared weighted binary generator," in Proceedings of the 13th International Conference on ASIC (ASICON), Chongqing, China, 2019, pp. 14. C39. Menghui Xu, Weikang Qian, Zaichen Zhang, Xiaohu You, and Chuan Zhang, "A data structurebased approximate belief propagation decoder for polar codes," in Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems (SiPS), Nanjing, China, 2019, pp. 3742. (Invited paper) C38. Weikang Qian, Runsheng Wang, Yuan Wang, Marc Riedel, and Ru Huang, "A survey of computationdriven data encoding," in Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems (SiPS), Nanjing, China, 2019, pp. 712. (Invited paper) (The first two authors contributed equally.) C37. Chang Meng*, Paul Weng, Sanbao Su*, and Weikang Qian, "Advanced ordering search for multilevel approximate logic synthesis," in Proceedings of the 2019 International Workshop on Logic and Synthesis (IWLS), Lausanne, Switzerland, 2019, pp. 8996. C36. Kuncai Zhong*, Meng Yang*, and Weikang Qian, "Optimizing stochastic computingbased FIR filters," in Proceedings of the 2018 IEEE International Conference on Digital Signal Processing (DSP), Shanghai, China, 2018. (Invited paper) C35. Zhuangzhuang Zhou^, Yue Yao^, Shuyang Huang^, Sanbao Su*, Chang Meng*, and Weikang Qian, "DALS: Delaydriven approximate logic synthesis," in Proceedings of the 2018 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Diego, CA, USA, 2018, pp. 86:186:7. (Acceptance rate: 24.7%) (Source code: ) C34. Bingzhe Li, Meng Yang*, Soheil Mohajer, Weikang Qian, and David J. Lilja, "Tiercode: An XORbased RAID6 code with improved write and degradedmode read performance," in Proceedings of the 13th IEEE International Conference on Networking, Architecture, and Storage, Chongqing, China, 2018, pp. 110. C33. Meng Yang*, Bingzhe Li, David J. Lilja, Bo Yuan, and Weikang Qian, "Towards theoretical cost limit of stochastic number generators for stochastic computing," in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hongkong, 2018, pp. 154159. (Invited paper) C32. Sanbao Su*, Yi Wu*, and Weikang Qian, "Efficient batch statistical error estimation for iterative multilevel approximate logic synthesis," in Proceedings of the 2018 Design Automation Conference (DAC), San Francisco, CA, USA, 2018, pp. 54:154:6. (Acceptance rate: 24.3%) (Source code: ) C31. Menghui Xu, Shusen Jing, Jun Lin, Weikang Qian, Zaichen Zhang, Xiaohu You, and Chuan Zhang, "Approximate belief propagation decoder for polar code," in Proceedings of the 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Calgary, AB, Canada, 2018, pp. 11691173. C30. Yue Yao^, Shuyang Huang^, Chen Wang*, Yi Wu*, and Weikang Qian, "Approximate disjoint bidecomposition and its application to approximate logic synthesis," in Proceedings of the 35th IEEE International Conference on Computer Design (ICCD), Boston, MA, USA, 2017, pp. 517524. (Acceptance rate: 29.1%) C29. Meng Yang*, John Hayes, Deliang Fan, and Weikang Qian, "Design of accurate stochastic number generators with noisy emerging devices for stochastic computing," in Proceedings of the 2017 IEEE/ACM International Conference on ComputerAided Design (ICCAD), Irvine, CA, USA, 2017, pp. 638644. (Acceptance rate: 26.3%) C28. Meng Yang* and Weikang Qian, "Design of reliable stochastic number generators using emerging devices for stochastic computing," in Proceedings of the 2017 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2017, pp. 5259. C27. Yi Wu*, Chuyu Shen*, Yi Jia^, and Weikang Qian, "Approximate logic synthesis for FPGA by wire removal and local function change", in Proceedings of the 2017 Asia and South Pacific Design Automation Conference (ASPDAC), Chiba, Japan, 2017, pp. 163169. (Acceptance rate: 31.0%) C26. Xuesong Peng* and Weikang Qian, "A branchandboundbased minterm assignment algorithm for synthesizing stochastic circuit", in Proceedings of the 2016 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2016, pp. 155162. (Nominated for Best Student Paper Award) C25. Yi Wu* and Weikang Qian, "An efficient method for multilevel approximate logic synthesis under error rate constraint", in Proceedings of the 2016 Design Automation Conference (DAC), Austin, TX, USA, 2016, pp. 128:1128:6. (Acceptance rate: 22.6%) C24. Rui Zhou^ and Weikang Qian, "A general sign bit error correction scheme for approximate adders", in Proceedings of the 2016 Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2016, pp. 221226. (Acceptance rate: 25.4%) C23. Chuyu Shen*, Zili Lin*, Ping Fan, Xianglong Meng, and Weikang Qian, "Parallelizing FPGA technology mapping through partitioning", in Proceedings of the 2016 International Symposium on FieldProgrammable Custom Computing Machines (FCCM), Washington D.C., USA, 2016, pp. 164167. (Acceptance rate: 24.1%) C22. Lezhong Huang^, Guanhui Chen^, Peng Li, and Weikang Qian, "Accelerating stochastic computation for binary classification applications," in Proceeding of the 41st IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Shanghai, China, 2016, pp. 65306534. (Invited paper) C21. Chen Zou^, Weikang Qian, and Jie Han, "DPALS: A dynamic programmingbased algorithm for twolevel approximate logic synthesis," in Proceedings of the 11th International Conference on ASIC (ASICON), Chengdu, China, 2015, pp. 14. C20. Chen Wang*, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, and Weikang Qian, "Timingdriven placement for carbon nanotube circuits," in Proceedings of the 2015 IEEE International SystemonChip Conference (SOCC), Beijing, China, 2015, pp. 362367. (Invited paper) C19. Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, and Li Jiang "On microarchitectural modeling for CNFETbased circuits," in Proceedings of the 2015 IEEE International SystemonChip Conference (SOCC), Beijing, China, 2015, pp. 356361. (Invited paper) C18. Yi Wu*, Chen Wang*, and Weikang Qian, "Minimizing error of stochastic computation through linear transformation," in Proceedings of the 2015 Great Lakes Symposium on VLSI (GLSVLSI), Pittsburgh, PA, USA, 2015, pp. 349354. (Invited paper) C17. Junjun Hu* and Weikang Qian, "A new approximate adder with low relative error and correct sign calculation," in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp. 14491454. (Acceptance rate: 22.4%) C16. Zheng Zhao* and Weikang Qian, "A general design of stochastic circuit and its synthesis," in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp. 14671472. (Acceptance rate: 22.4%) C15. Yili Ding^, Yi Wu*, and Weikang Qian, "Generating multiple correlated probabilities for MUXbased stochastic computing architecture," in Proceedings of the 2014 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Jose, CA, USA, 2014, pp. 519526. (Acceptance rate: 25.3%) C14. Zheng Zhao*, ChianWei Liu, ChunYao Wang, and Weikang Qian, "BDDbased synthesis of reconfigurable singleelectron transistor arrays," in Proceedings of the 2014 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Jose, CA, USA, 2014, pp. 4754. (Acceptance rate: 25.3%) C13. Daran Cai^, Ang Wang^, Ge Song^, and Weikang Qian, "An ultrafast parallel architecture using sequential circuits computing on random bits," in Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp. 22152218. C12. Chen Wang* and Weikang Qian, "Optimizing multilevel combinational circuits for generating random bits," in Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, 2013, pp. 139144. (Acceptance rate: 31.2%) C11. Weikang Qian, Chen Wang*, Peng Li, David J. Lilja, Kia Bazargan, and Marc D. Riedel, "An efficient implementation of numerical integration using logical computation on stochastic bit streams," in Proceedings of the 2012 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Jose, CA, USA, 2012, pp. 156162. (Invited paper) C10. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, "The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic," in Proceedings of the 2012 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Jose, CA, USA, 2012, pp. 480487. (Acceptance rate: 24.3%) C9. Peng Li, Weikang Qian, and David J. Lilja, "A stochastic reconfigurable architecture for faulttolerant computation with sequential logic," in Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, QC, Canada, 2012, pp. 303308. C8. Peng Li, Weikang Qian, David Lilja, Kia Bazargan, and Marc Riedel, "Case studies of logical computation on stochastic bit streams," in Proceedings of the 22nd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Newcastle upon Tyne, UK, 2012. (Invited paper) C7. Peng Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "The synthesis of linear finite state machinebased stochastic computational elements," in Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASPDAC), Sydney, Australia, 2012, pp. 757762. (Acceptance rate: 34.1%) C6. Weikang Qian and Marc D. Riedel, "Twolevel logic synthesis for probabilistic computation," in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp. 95102. C5. Weikang Qian and Marc D. Riedel, "Synthesizing cubes to satisfy a given intersection pattern," in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp. 217224. C4. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "The synthesis of combinational logic to generate probabilities," in Proceedings of the 2009 IEEE/ACM International Conference on ComputerAided Design (ICCAD), San Jose, CA, USA, 2009, pp. 367374. (Nominated for Best Paper Award; Acceptance rate: 26.3%) C3. Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "A reconfigurable stochastic architecture for highly reliable computing," in Proceedings of the 19th IEEE Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2009, pp. 315320. (Acceptance rate for long presentation: 15.8%) C2. Weikang Qian and Marc D. Riedel, "The synthesis of robust polynomial arithmetic with stochastic logic," in Proceedings of the 45th ACM/IEEE Design Automation Conference (DAC), Anaheim, CA, USA, 2008, pp. 648653. (Acceptance rate: 23.0%) C1. Weikang Qian and Marc D. Riedel, "The synthesis of stochastic logic to perform multivariate polynomial arithmetic," in Proceedings of the 17th International Workshop on Logic and Synthesis (IWLS), Lake Tahoe, CA, USA, 2008, pp. 7986. 