Lab Logo

  Emerging Computing Technology Laboratory at SJTU

HomePeopleResearchPublicationsTeachingActivitiesCodes & Links


Notes
  • The papers are provided here for the readers' convenience. To get the final published versions, the readers are suggested to download them from the corresponding online libraries (e.g., IEEE xplore and ACM digial library). Note that the final published versions may have very small difference than the papers provided here, mainly in typesetting.
  • The marks * and ^ indicate the supervised graduate and undergraduate students, respectively.

Book Chapters
B5. Zhiyuan Xiang^$, Niyiqiu Liu^$, Yue Yao^, Fan Yang, Cheng Zhuo, and Weikang Qian, "Approximate logic synthesis for FPGA by decomposition," in Approximate Computing, Weiqiang Liu and Fabrizio Lombardi editors, Springer Publishing, 2022, pp. 149-174. ($These authors contributed equally.)

B4. Ying Wu, Chuangtao Chen, Chenyi Wen, Weikang Qian, Xunzhao Yin, and Cheng Zhuo, "Approximate multiplier design for energy efficiency: From circuit to algorithm," in Approximate Computing, Weiqiang Liu and Fabrizio Lombardi editors, Springer Publishing, 2022, pp. 51-76.

B3. Marc Riedel and Weikang Qian "Synthesis of polynomial functions," in Stochastic Computing: Techniques and Applications, Warren Gross and Vincent Gaudet editors, Springer Publishing, 2019.


B2. Xuesong Peng* and Weikang Qian, "A branch-and-bound-based minterm assignment algorithm for synthesizing stochastic circuit," in Advanced Logic Synthesis, Andre Reis and Rolf Drechsler editors, Springer Publishing, 2018.
 
B1. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "Synthesizing combinational logic to generate probabilities: theories and algorithms," in Advanced Techniques in Logic Synthesis, Optimizations and Applications, Sunil Khatri and Kanupriya Gulati editors, Springer Publishing, 2011.

Journal Papers
J27. Chang Meng*, Zhuangzhuang Zhou^, Yue Yao^, Shuyang Huang^, Yuhang Chen, and Weikang Qian, "HEDALS: Highly efficient delay-driven approximate logic synthesis," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023. (Source code: https://github.com/SJTU-ECTL/HEDALS)

J26. Patrick Holec, Weikang Qian, Marc Riedel, and Ivo Rosenberg, "Characterizing polynomial arithmetic with stochastic circuits," in Journal of Multiple-Valued Logic and Soft Computing, 2022.

J25. Yixuan Hu, Yawen Zhang, Runsheng Wang, Zuodong Zhang, Jiahao Song, Xiyuan Tang, Weikang Qian, Yanzhi Wang, Yuan Wang, and Ru Huang, "A 28nm 198.9 TOPS/W fault-tolerant stochastic computing neural network processor," in IEEE Solid-State Circuits Letters, vol. 5, pp. 198-201, 2022.

J24. Sanbao Su*$, Chang Meng*$, Fan Yang, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao, and Weikang Qian, "VECBEE: A versatile efficiency-accuracy configurable batch error estimation method for greedy approximate logic synthesis," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022. ($These authors contributed equally.) (Source code: https://github.com/SJTU-ECTL/VECBEE)

J23. Chuangtao Chen, Weikang Qian, Mohsen Imani, Xunzhao Yin, and Cheng Zhuo, "PAM: A piecewise-linearly-approximated floating-point multiplier with unbiasedness and configurability," in IEEE Transactions on Computers, 2021.

J22. Weikang Qian, "Logic synthesis for approximate circuits," in Communications of the China Computer Federation, vol. 17, no. 12, pp. 22-25, 2021. (Invited Paper; in Chinese)

J21. Yanan Sun, Chang Ma*, Zhi Li, Yilong Zhao, Jiachen Jiang, Weikang Qian, Rui Yang, Zhezhi He, and Li Jiang, "Unary coding and variation-aware optimal mapping scheme for reliable ReRAM-based neuromorphic computing," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021.

J20. Chuliang Guo, Li Zhang, Xian Zhou, Grace Li Zhang, Bing Li, Weikang Qian, Xunzhao Yin, and Cheng Zhuo, "A reconfigurable multiplier for signed multiplications with asymmetric bit-widths," in ACM Journal on Emerging Technologies in Computing Systems, vol. 17, no. 4, pp. 48:1-48:16, 2021.

J19. Yi Wu* and Weikang Qian, "ALFANS: Multi-level approximate logic synthesis framework by approximate node simplification,"
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 7, pp. 1470-1483, 2020.

J18. Sanbao Su*, Chen Zou^, Weijiang Kong^, Jie Han, and Weikang Qian, "A novel heuristic search method for two-level approximate logic synthesis," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 3, pp. 654-669, 2020.

J17. Zhijing Li^, Zhao Chen^, Yili Zhang^, Zixin Huang^, and Weikang Qian, "Simultaneous area and latency optimization for stochastic circuits by D flip-flop insertion," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 7, pp. 1251-1264, 2019.

J16. Yanan Sun, Jiawei Gu, Weifeng He, Qian Wang, Naifeng Jing, Zhigang Mao, Weikang Qian, and Li Jiang, "Energy-efficient nonvolatile SRAM design based on resistive switching multi-level cell," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 5, pp. 753-757, 2019.

J15. Junjun Hu*, Zhijing Li^, Meng Yang*, Zixin Huang^, and Weikang Qian, "A high-accuracy approximate adder with correct sign calculation," in Integration, the VLSI Journal, vol. 65, pp. 370-388, 2019.
      
J14.
Yi Wu*$, You Li^$, Xiangxuan Ge^$, Yuan Gao^, and Weikang Qian, "An efficient method for calculating the error statistics of block-based approximate adders," in IEEE Transactions on Computers, vol. 68, no. 1, pp. 21-38, 2019. ($These authors contributed equally and are considered as the co-first authors.)

J13. Xuesong Peng* and Weikang Qian, "Stochastic circuit synthesis by cube assignment," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 12, pp. 3109-3122, 2018.

J12.
Armin Alaghi, Weikang Qian, and John Hayes, "The promise and challenge of stochastic computing," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 8, pp. 1515-1531, 2018. (Keynote paper)

J11.
Chen Wang*, Yanan Sun, Shiyan Hu, Li Jiang, and Weikang Qian, "Variation-aware global placement for improving timing-yield of carbon-nanotube field effect transistor circuit, " in ACM Transactions on Design Automation of Electronic Systems, vol. 23, no. 4, pp. 44:1-44:27, 2018.

J10. Yanbo Wang, Weikang Qian, and Bo Yuan, "A graphical model of smoking-induced global instability in lung cancer," in IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol. 15, no.1, pp. 1-14, 2018.

J9. M. Hassan Najafi, Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, "A reconfigurable architecture with sequential logic-based stochastic computing," in ACM Journal on Emerging Technologies in Computing Systems, vol. 13, no. 4, pp. 57:1-57:28, 2017.

J8. Yu Wang^, Weikang Qian, Shuchang Zhang, Xiaoyao Liang, and Bo Yuan, "A learning algorithm for Bayesian networks and its efficient implementation on GPUs," in IEEE Transactions on Parallel and Distributed Systems, vol. 27, no. 1, pp. 17-30, 2016.

J7. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, "Synthesizing cubes to satisfy a given intersection pattern," in Journal of Discrete Applied Mathematics, vol. 193, pp. 11-38, 2015.

J6. Peng Li, David J. Lilja, Weikang Qian, Marc D. Riedel, and Kia Bazargan, "Logical computation on stochastic bit streams with linear finite state machines," in IEEE Transactions on Computers, vol. 63, no. 6, pp. 1474-1486, 2014.

J5. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc. D. Riedel, "Computation on stochastic bit streams: digital image processing case studies," in IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 22, no. 3, pp. 449-462, 2014.

J4. Weikang Qian, Marc D. Riedel, Hongchao Zhou, and Jehoshua Bruck, "Transforming probabilities with combinational logic," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 9, pp. 1279-1292, 2011.

J3. Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "An architecture for fault-tolerant computation with stochastic logic," in IEEE Transactions on Computers, vol. 60, no. 1, pp. 93-105, 2011.

J2. Weikang Qian, Marc D. Riedel, and Ivo Rosenberg, "Uniform approximation and Bernstein polynomials with coefficients in the unit interval," in European Journal of Combinatorics, vol. 32, no. 3, pp. 448-463, 2011.


J1. Weikang Qian, John Backes, and Marc D. Riedel, "The synthesis of stochastic circuits for nanoscale computation," in International Journal of Nanotechnology and Molecular Computation, vol. 1, no. 4, pp. 39-57, 2010.


Conference Papers
C73. Xuan Wang*, Sijun Tao^, Jingjing Zhu^, Yiyu Shi, and Weikang Qian, "AccALS: Accelerating approximate logic synthesis by selection of multiple local approximate changes," in Proceedings of the 2023 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2023. (Acceptance rate: 23%)

C72. Chen Nie$, Xianjue Cai*$, Chenyang Lv$, Chen Huang^, Weikang Qian, and Zhezhi He, "XMG-GPPIC: Efficient and Robust General-Purpose Processing-in-Cache with XOR-Majority-Graph," in Proceedings of the 2023 Great Lakes Symposium on VLSI (GLSVLSI), Knoxville, TN, USA, 2023. ($These authors contributed equally.)

C71. Jian Shi* and Weikang Qian, "Implementing Boolean function by ternary content addressable memory with approximate match," in Proceedings of the 2023 China Semiconductor Technology International Conference (CSTIC), Shanghai, China, 2023.

C70. Xingyue Qian*, Chang Meng*, Xiaolong Shen, Junfeng Zhao, Leibin Ni, and Weikang Qian, "High-accuracy low-power reconfigurable architectures for decomposition-based approximate lookup table," in Proceedings of the 2023 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2023. (Acceptance rate: 25%)

C69. Chang Meng*, Jiajun Sun^, Yuqi Mai^, and Weikang Qian, "MECALS: A maximum error checking technique for approximate logic synthesis," in Proceedings of the 2023 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2023. (Acceptance rate: 25%)
(Source code: https://github.com/SJTU-ECTL/MECALS)

C68. Kuncai Zhong*, Xuan Wang*, Chen Wang*, and Weikang Qian, "Joint optimization of randomizer and computing core for low-cost stochastic circuits," in Proceedings of the ACM International Symposium on Nanoscale Architectures (NANOARCH), virtual event, 2022. (Invited paper)

C67. Kuncai Zhong*, Zexi Li^, Haoran Jin^, and Weikang Qian, "Exploiting uniform spatial distribution to design efficient random number source for stochastic computing," in Proceedings of the 2022 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA, 2022. (Acceptance rate: 22.5%)

C66. Weihua Xiao* and Weikang Qian, "ASPPLN: Accelerated symbolic probability propagation in logic network," in Proceedings of the 2022 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA, 2022. (Acceptance rate: 22.5%)

C65. Xingyue Qian*, Jian Shi*, Li Shi^, Haoyang Zhang^, Lijian Bian, and Weikang Qian, "Scheduling information-guided efficient high-level synthesis design space exploration," in Proceedings of the 40th IEEE International Conference on Computer Design (ICCD), Lake Tahoe, USA, 2022.

C64. Chang Meng*$, Xuan Wang*$, Jiajun Sun^, Sijun Tao^, Wei Wu, Zhihang Wu, Leibin Ni, Xiaolong Shen, Junfeng Zhao, and Weikang Qian, "SEALS: Sensitivity-driven efficient approximate logic synthesis," in Proceedings of the 2022 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2022. ($These authors contributed equally and are considered as the co-first authors; Jiajun Sun and Sijun Tao also contributed equally.) (Acceptance rate: 23%)

C63. Ziqi Meng*, Yanan Sun, and Weikang Qian, "Write or not: Programming scheme optimization for RRAM-based neuromorphic computing," in Proceedings of the 2022 ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, USA, 2022. (Acceptance rate: 23%)

C62. Xuan Wang* and Weikang Qian, "MinAC: Minimal-area approximate compressor design based on exact synthesis for approximate multipliers," in Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022. (Source code: https://github.com/SJTU-ECTL/MinAC)

C61. Chenfei Lou^, Weihua Xiao*, and Weikang Qian, "Quantified satisfiability-based simultaneous selection of multiple local approximate changes under maximum error bound," in Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022.

C60. Kuncai Zhong*, Zexi Li^, and Weikang Qian, "Towards low-cost high-accuracy stochastic computing architecture for univariate functions: Design and design space exploration," in Proceedings of the 2022 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2022. (Acceptance rate: 25%)

C59. Weihua Xiao*, Cheng Zhuo, and Weikang Qian, "OPACT: Optimization of approximate compressor tree for approximate multiplier," in Proceedings of the 2022 Design, Automation, and Test in Europe Conference (DATE), Antwerp, Belgium, 2022. (Acceptance rate: 25%)

C58. Chen Wang* and Weikang Qian, "Linear feedback shift register reseeding for stochastic circuit repairing and minimization," to appear in Proceedings of the 2022 Asia and South Pacific Design Automation Conference (ASPDAC), Taipei, Taiwan, 2022.

C57. Xuan Wang*, Zhufei Chu, and Weikang Qian, "MinSC: An exact synthesis-based method for minimal-area stochastic circuits under relaxed error bound," to appear in Proceedings of the 2021 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Germany, 2021.
(Acceptance rate: 23.5%) (Source code: https://github.com/SJTU-ECTL/MinSC)

C56. Chang Meng*, Zhiyuan Xiang^, Niyiqiu Liu^, Yixuan Hu, Jiahao Song, Runsheng Wang, Ru Huang, and Weikang Qian, "DALTA: A decomposition-based approximate lookup table architecture," to appear in Proceedings of the 2021 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Germany, 2021.
(Acceptance rate: 23.5%)

C55. Yifan Qian^, Chang Meng*, Yawen Zhang, Weikang Qian, Runsheng Wang, and Ru Huang, "Approximate logic synthesis in the loop for designing low-power neural network accelerator," in Proceedings of the 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, South Korea, 2021, pp. 1-5. (Invited paper)

C54. Runsheng Wang, Zuodong Zhang, Yawen Zhang, Yixuan Hu, Yanan Sun, Weikang Qian, and Ru Huang, "Can emerging computing paradigms help enhancing reliability towards the end of technology roadmap?" in Proceedings of the 2021 International Reliability Physics Symposium (IRPS), virtual event, 2021, pp. 1-7. (Invited paper)

C53. Weiyi Liu, Yanan Sun, Weifeng He, and Weikang Qian, "Design of ternary logic based on ReRAM crossbars," in Proceedings of the 2021 China Semiconductor Technology International Conference (CSTIC), virtual event, Shanghai, China, 2021, pp. 1-3.

C52. Weihua Xiao*, Weikang Qian, and Weiqiang Liu, "GOMIL: global optimization of multiplier by integer linear programming," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event, Grenoble, France, 2021, pp. 374-379. (Acceptance rate: 23.9%) (Source code: https://github.com/SJTU-ECTL/GOMIL)
 
C51. Ziqi Meng*, Weikang Qian, Yanan Sun, Yilong Zhao, Rui Yang, and Li Jiang, "Digital offset for RRAM-based neuromorphic computing: a novel solution to conquer cycle-to-cycle variation," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event
, Grenoble, France, 2021, pp. 1078-1083. (Acceptance rate: 23.9%)

C50. Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, and Wen-Hao Liu, "ALIFRouter: a practical architecture-level inter-FPGA router for logic verification," in Proceedings of the 2021 Design, Automation, and Test in Europe Conference (DATE), virtual event
, Grenoble, France, 2021, pp. 1570-1573. (Acceptance rate for poster: 36%)

C49. Chen Wang*, Weihua Xiao*, John Hayes, and Weikang Qian, "Exploring target function approximation for stochastic circuit minimization," in Proceedings of the 2020 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), virtual event, 2020, pp. 122:1-122:9.
(Acceptance rate: 27.0%) (Source code: https://github.com/SJTU-ECTL/TFASC)

C48. Chuangtao Chen, Sen Yang, Weikang Qian, Mohsen Imani, Xunzhao Yin, and Cheng Zhuo, "Optimally approximated and unbiased floating-point multiplier with runtime configurability," in Proceedings of the 2020 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), virtual event, 2020, pp. 121:1-121:9.
(Nominated for Best Paper Award; Acceptance rate: 27.0%)

C47. Zuodong Zhang, Runsheng Wang, Zhe Zhang, Ru Huang, Chang Meng*, Weikang Qian, and Zhuangzhuang Zhou^, "Reliability-enhanced circuit design flow based on approximate logic synthesis," in Proceedings of the 2020 Great Lakes Symposium on VLSI (GLSVLSI), virtual event, 2020, pp. 71-76.

C46. Chang Meng*, Weikang Qian, and Alan Mishchenko, "ALSRAC: approximate logic synthesis by resubstitution with approximate care set," in Proceedings of the 2020 Design Automation Conference (DAC),
virtual event, 2020, pp. 187:1-187:6. (Acceptance rate: 23.2%) (Source code: https://github.com/SJTU-ECTL/ALSRAC)

C45. Yawen Zhang*, Runsheng Wang, Yixuan Hu, Weikang Qian, Yanzhi Wang, Yuan Wang, and Ru Huang, "Accurate and energy-efficient implementation of non-linear adder in parallel stochastic computing using sorting network," in Proceedings of the 2020 IEEE International Symposium on Circuits and Systems (ISCAS), virtual event, 2020, pp. 1-5.

C44. Kuncai Zhong* and Weikang Qian, "Accuracy analysis for stochastic circuits with D flip-flop insertion," in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE),
virtual event, 2020, pp. 598-603. (Acceptance rate: 25.9%)

C43. Chang Ma*, Yanan Sun, Weikang Qian, Ziqi Meng*, Rui Yang, and Li Jiang, "Go unary: a novel synapse coding and mapping scheme for reliable ReRAM-based neuromorphic computing," in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE), virtual event, 2020, pp. 1432-1437. (Nominated for Best Paper Award; Acceptance rate: 25.9%)

C42. Yawen Zhang*, Sheng Lin, Runsheng Wang, Yanzhi Wang, Yuan Wang, Weikang Qian, and Ru Huang, "When sorting network meets parallel bitstreams: A fault-tolerant parallel ternary neural network (TNN) accelerator based on stochastic computing,"
in Proceedings of the 2020 Design, Automation, and Test in Europe Conference (DATE), virtual event, 2020, pp. 1287-1290. (Acceptance rate for poster: 37%)

C41. Chuliang Guo, Li Zhang, Xian Zhou, Weikang Qian, and Cheng Zhuo, "A reconfigurable approximate multiplier for quantized CNN applications," in Proceedings of the 2020 Asia and South Pacific Design Automation Conference (ASPDAC), Beijing, China, 2020, pp. 235-240. (Acceptance rate: 30.8%)

C40. Lun Zhang*, Weikang Qian, and Haibao Chen, "Area-efficient parallel stochastic computing with shared weighted binary generator," in Proceedings of the 13th International Conference on ASIC (ASICON), Chongqing, China, 2019, pp. 1-4.

C39. Menghui Xu, Weikang Qian, Zaichen Zhang, Xiaohu You, and Chuan Zhang, "A data structure-based approximate belief propagation decoder for polar codes," in Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems (SiPS), Nanjing, China, 2019, pp. 37-42. (Invited paper)

C38. Weikang Qian, Runsheng Wang, Yuan Wang, Marc Riedel, and Ru Huang, "A survey of computation-driven data encoding," in Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems (SiPS), Nanjing, China, 2019, pp. 7-12. (Invited paper) (
The first two authors contributed equally.)

C37. Chang Meng*, Paul Weng, Sanbao Su*, and Weikang Qian, "Advanced ordering search for multi-level approximate logic synthesis," in Proceedings of the 2019 International Workshop on Logic and Synthesis (IWLS), Lausanne, Switzerland, 2019, pp. 89-96.

C36. Kuncai Zhong*, Meng Yang*, and Weikang Qian, "Optimizing stochastic computing-based FIR filters," in Proceedings of the 2018 IEEE International Conference on Digital Signal Processing (DSP), Shanghai, China, 2018. (Invited paper)

C35. Zhuangzhuang Zhou^, Yue Yao^, Shuyang Huang^, Sanbao Su*, Chang Meng*, and Weikang Qian, "DALS: Delay-driven approximate logic synthesis," in Proceedings of the 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego, CA, USA, 2018, pp. 86:1-86:7. (Acceptance rate: 24.7%) (Source code: Link)

C34. Bingzhe Li, Meng Yang*, Soheil Mohajer, Weikang Qian, and David J. Lilja, "Tier-code: An XOR-based RAID-6 code with improved write and degraded-mode read performance," in Proceedings of the 13th IEEE International Conference on Networking, Architecture, and Storage, Chongqing, China, 2018, pp. 1-10.

C33. Meng Yang*, Bingzhe Li, David J. Lilja, Bo Yuan, and Weikang Qian, "Towards theoretical cost limit of stochastic number generators for stochastic computing," in Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Hongkong, 2018, pp. 154-159. (Invited paper)

C32. Sanbao Su*, Yi Wu*, and Weikang Qian, "Efficient batch statistical error estimation for iterative multi-level approximate logic synthesis," in Proceedings of the 2018 Design Automation Conference (DAC), San Francisco, CA, USA, 2018, pp. 54:1-54:6.
(Acceptance rate: 24.3%) (Source code: https://github.com/SJTU-ECTL/VECBEE)
 
C31. Menghui Xu, Shusen Jing, Jun Lin, Weikang Qian, Zaichen Zhang, Xiaohu You, and Chuan Zhang, "Approximate belief propagation decoder for polar code," in Proceedings of the 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Calgary, AB, Canada, 2018, pp. 1169-1173.

C30. Yue Yao^, Shuyang Huang^, Chen Wang*, Yi Wu*, and Weikang Qian, "Approximate disjoint bi-decomposition and its application to approximate logic synthesis," in Proceedings of the 35th IEEE International Conference on Computer Design (ICCD), Boston, MA, USA, 2017, pp. 517-524.
(Acceptance rate: 29.1%)

C29. Meng Yang*, John Hayes, Deliang Fan, and Weikang Qian, "Design of accurate stochastic number generators with noisy emerging devices for stochastic computing," in Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Irvine, CA, USA, 2017, pp. 638-644.
(Acceptance rate: 26.3%)

C28. Meng Yang* and Weikang Qian, "Design of reliable stochastic number generators using emerging devices for stochastic computing," in Proceedings of the 2017 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2017, pp. 52-59.

C27.
Yi Wu*, Chuyu Shen*, Yi Jia^, and Weikang Qian, "Approximate logic synthesis for FPGA by wire removal and local function change", in Proceedings of the 2017 Asia and South Pacific Design Automation Conference (ASPDAC), Chiba, Japan, 2017, pp. 163-169.
(Acceptance rate: 31.0%)

C26. Xuesong Peng* and Weikang Qian, "A branch-and-bound-based minterm assignment algorithm for synthesizing stochastic circuit", in Proceedings of the 2016 International Workshop on Logic and Synthesis (IWLS), Austin, TX, USA, 2016, pp. 155-162. (Nominated for Best Student Paper Award)

C25. Yi Wu* and Weikang Qian, "An efficient method for multi-level approximate logic synthesis under error rate constraint", in Proceedings of the 2016 Design Automation Conference (DAC), Austin, TX, USA, 2016, pp. 128:1-128:6.
(Acceptance rate: 22.6%)

C24. Rui Zhou^ and Weikang Qian, "A general sign bit error correction scheme for approximate adders", in Proceedings of the 2016 Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2016, pp. 221-226.
(Acceptance rate: 25.4%)

C23. Chuyu Shen*, Zili Lin*, Ping Fan, Xianglong Meng, and Weikang Qian, "Parallelizing FPGA technology mapping through partitioning", in Proceedings of the 2016 International Symposium on Field-Programmable Custom Computing Machines (FCCM), Washington D.C., USA, 2016, pp. 164-167.
(Acceptance rate: 24.1%)

C22. Lezhong Huang^, Guanhui Chen^, Peng Li, and Weikang Qian, "Accelerating stochastic computation for binary classification applications," in Proceeding of the 41st IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Shanghai, China, 2016, pp. 6530-6534. (Invited paper)

C21. Chen Zou^, Weikang Qian, and Jie Han, "DPALS: A dynamic programming-based algorithm for two-level approximate logic synthesis," in Proceedings of the 11th International Conference on ASIC (ASICON), Chengdu, China, 2015, pp. 1-4.

C20. Chen Wang*, Li Jiang, Shiyan Hu, Tianjian Li, Xiaoyao Liang, Naifeng Jing, and Weikang Qian, "Timing-driven placement for carbon nanotube circuits," in Proceedings of the 2015 IEEE International System-on-Chip Conference (SOCC), Beijing, China, 2015, pp. 362-367. (Invited paper)


C19. Tianjian Li, Hao Chen, Weikang Qian, Xiaoyao Liang, and Li Jiang "On microarchitectural modeling for CNFET-based circuits," in Proceedings of the 2015 IEEE International System-on-Chip Conference (SOCC), Beijing, China, 2015, pp. 356-361. (Invited paper)

C18. Yi Wu*, Chen Wang*, and Weikang Qian, "Minimizing error of stochastic computation through linear transformation," in Proceedings of the 2015 Great Lakes Symposium on VLSI (GLSVLSI), Pittsburgh, PA, USA, 2015, pp. 349-354. (Invited paper)


C17. Junjun Hu* and Weikang Qian, "A new approximate adder with low relative error and correct sign calculation," in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp. 1449-1454.
(Acceptance rate: 22.4%)

C16. Zheng Zhao* and Weikang Qian, "A general design of stochastic circuit and its synthesis," in Proceedings of the 2015 Design, Automation, and Test in Europe Conference (DATE), Grenoble, France, 2015, pp. 1467-1472. (Acceptance Rate: 22.4%)

C15. Yili Ding^, Yi Wu*, and Weikang Qian, "Generating multiple correlated probabilities for MUX-based stochastic computing architecture," in Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2014, pp. 519-526.
(Acceptance rate: 25.3%)

C14. Zheng Zhao*, Chian-Wei Liu, Chun-Yao Wang, and Weikang Qian, "BDD-based synthesis of reconfigurable single-electron transistor arrays," in Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2014, pp. 47-54.
(Acceptance rate: 25.3%)

C13. Daran Cai^, Ang Wang^, Ge Song^, and Weikang Qian, "An ultra-fast parallel architecture using sequential circuits computing on random bits," in Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp. 2215-2218.

C12. Chen Wang* and Weikang Qian, "Optimizing multi-level combinational circuits for generating random bits," in Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, 2013, pp. 139-144.
(Acceptance rate: 31.2%)
 
C11. Weikang Qian, Chen Wang*, Peng Li, David J. Lilja, Kia Bazargan, and Marc D. Riedel, "An efficient implementation of numerical integration using logical computation on stochastic bit streams," in Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2012, pp. 156-162. (Invited paper)

C10. Peng Li, David J. Lilja, Weikang Qian, Kia Bazargan, and Marc D. Riedel, "The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic," in Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2012, pp. 480-487.
(Acceptance rate: 24.3%)
 
C9. Peng Li, Weikang Qian, and David J. Lilja, "A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic," in Proceedings of the 30th IEEE International Conference on Computer Design (ICCD), Montreal, QC, Canada, 2012, pp. 303-308.

C8. Peng Li, Weikang Qian, David Lilja, Kia Bazargan, and Marc Riedel, "Case studies of logical computation on stochastic bit streams," in Proceedings of the 22nd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Newcastle upon Tyne, UK, 2012. (Invited paper)

C7. Peng Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "The synthesis of linear finite state machine-based stochastic computational elements," in Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASPDAC), Sydney, Australia, 2012, pp. 757-762.
(Acceptance rate: 34.1%)

C6. Weikang Qian and Marc D. Riedel, "Two-level logic synthesis for probabilistic computation," in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp. 95-102.

C5. Weikang Qian and Marc D. Riedel, "Synthesizing cubes to satisfy a given intersection pattern," in Proceedings of the 19th International Workshop on Logic and Synthesis (IWLS), Irvine, CA, USA, 2010, pp. 217-224.

C4. Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "The synthesis of combinational logic to generate probabilities," in Proceedings of the 2009 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, 2009, pp. 367-374. (Nominated for Best Paper Award; Acceptance rate: 26.3%)

C3. Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan, and David J. Lilja, "A reconfigurable stochastic architecture for highly reliable computing," in Proceedings of the 19th IEEE Great Lakes Symposium on VLSI (GLSVLSI), Boston, MA, USA, 2009, pp. 315-320. (Acceptance rate for long presentation: 15.8%)

C2. Weikang Qian and Marc D. Riedel, "The synthesis of robust polynomial arithmetic with stochastic logic," in Proceedings of the 45th ACM/IEEE Design Automation Conference (DAC), Anaheim, CA, USA, 2008, pp. 648-653. (Acceptance rate: 23.0%)
 
C1. Weikang Qian and Marc D. Riedel, "The synthesis of stochastic logic to perform multivariate polynomial arithmetic," in Proceedings of the 17th International Workshop on Logic and Synthesis (IWLS), Lake Tahoe, CA, USA, 2008, pp. 79-86.